Display Device and Driving Method of the Same

ABSTRACT

A problem in that a light emitting element slightly emits light is solved by an off current of a thin film transistor connected in series to the light emitting element, thereby a display device which can perform a clear display by increasing contrast, and a driving method thereof are provided. When the thin film transistor connected in series to the light emitting element is turned off, a charge held in the capacitance of the light emitting element itself is discharged. Even when an off current is generated at the thin film transistor connected in series to the light emitting element, this off current charges this capacitance until the capacitance of the light emitting element itself holds a predetermined voltage again. Accordingly, the off current of the thin film transistor does not contribute to light emission. In this manner, a slight light emission of the light emitting element can be reduced.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a display device of an active matrix driving method in which a switching element is provided in each pixel, and a driving method thereof. In particular, the invention relates to a display device in which a luminance of a light emitting element is controlled by controlling a current supplied to the light emitting element by using a switching element connected in series to the light emitting element, and a driving method thereof. More particularly, the invention relates to a display device including an element with diode characteristics as a light emitting element and a driving method thereof.

2. Description of the Related Art

A display device including a thin film transistor as a switching element and a driving method thereof are suggested. FIG. 8A shows an example of a pixel configuration thereof.

In FIG. 8A, reference numeral 105 denotes a light emitting element, 102 denotes a thin film transistor, 103 denotes a first power source line, and 104 denotes a second power source line. The light emitting element 105 includes two electrodes and emits light at a luminance according to a supplied current value of a current flowing between two electrodes. One of the two electrodes of the light emitting element 105 is referred to as a first electrode 105 a while the other is referred to as a second electrode 105 b. In the pixel shown in FIG. 8A, a value of a current (hereinafter referred to as a drain current) flowing between a source and drain of the thin film transistor 102 is controlled according to a potential G1 applied to a gate of the thin film transistor 102. The drain current of the thin film transistor 102 flows between the first electrode 105 a and the second electrode 105 b of the light emitting element 105 connected in series to the thin film transistor 102. The light emitting element emits light at a luminance according to a supplied current. In this manner, by controlling the drain current of the thin film transistor 102, the luminance of the light emitting element 105 is controlled to perform a display.

An electroluminescence element and the like can be used as the light emitting element 105. An electroluminescence element has diode characteristics to flow a current in only one direction. FIG. 8B shows the light emitting element 105 in FIG. 8A as a diode. In FIG. 8B, the first electrode 105 a is an anode and the second electrode 105 b is a cathode.

A display device in which a reverse bias voltage is regularly applied to the light emitting element 105 as well as a forward bias voltage is applied to the light emitting element 105 to emit light, and a driving method thereof have been suggested (see Patent Document 1).

Patent Document 1

-   Japanese Patent Laid-Open No. 2002-190390

SUMMARY OF THE INVENTION

Hereinafter considered is the case where the light emitting element 105 emits no light so as to display “black” in FIG. 8B. A potential G1 is set appropriately to set a potential difference between the source and gate of the thin film transistor 102 to be equal to or lower than a threshold voltage of the thin film transistor 102 or lower, thereby the thin film transistor 102 is turned off. In this manner, the drain current of the thin film transistor 102 becomes zero so that the light emitting element 105 emits no light to display “black”. It is preferable that the thin film transistor 102 be completely turned off when a voltage equal to or lower than the threshold voltage is applied to the source and gate, however, the thin film transistor 102 is not completely turned off in actuality and a slight amount of drain current flows. This current is denoted as I_(off) in the drawing and referred to as an off current. Due to the off current I_(off), the light emitting element which is not supposed to emit light emits light (hereinafter this phenomenon is referred to as grayish black effect). Accordingly, there is a problem in that contrast of a display is decreased.

In particular, in the case where the light emitting element 105 continues to operate with a forward bias voltage, that is the case where the light emitting element 105 continues to operate with a potential of the first electrode 105 a (anode) being higher than that of the second electrode 105 b (cathode), such a problem is found that a grayish black effect becomes remarkable.

It is found out that the grayish black effect becomes remarkable in the case where the light emitting element 105 continues to operate with a forward bias voltage because a voltage approximately the same as the threshold voltage of the light emitting element 105 is constantly held between the first electrode 105 a and the second electrode 105 b.

The threshold voltage of the light emitting element is V_(th) in FIG. 8C. FIG. 8C shows a relationship of a current I flowing from the anode to cathode relatively to a potential difference V_(EL) between a potential at the second electrode 105 b (cathode) and a potential at the first electrode 105 a (anode). When V_(EL) becomes higher than the threshold voltage V_(th), the current I flows. That is, a current flows in the light emitting element 105 when a voltage higher than the threshold voltage V_(th) is applied between the first electrode 105 a (anode) and the second electrode 105 b (cathode), thereby the light emitting element 105 emits light.

A voltage approximately the same as the threshold voltage V_(th) is held between the first electrode 105 a (anode) and the second electrode 105 b (cathode) of the light emitting element 105 because of capacitance of the light emitting element 105 itself. FIG. 8D shows a light emitting element shown as a diode and FIG. 8E shows an equivalent circuit diagram of FIG. 8D. A capacitor 800 in the equivalent circuit corresponds to capacitance of the light emitting element 105 itself. The threshold voltage V_(th) is held by the capacitor 800.

In the case where the light emitting element 105 continues to operate with a forward bias voltage, a potential of the first electrode 105 a (anode) continues to be higher than that of the second electrode 105 b (cathode) even after the thin film transistor 102 is turned off, thereby a voltage approximately the same as the threshold voltage V_(th) is held in the capacitor 800 of the light emitting element 105. Therefore, when an off current I_(off) is generated in the thin film transistor 102, the off current I_(off) flows to a path 801 a on a diode 802 side without flowing to a path 801 b on the capacitor 800 side in the equivalent circuit of FIG. 8E, thereby contributing to light emission. In this manner, the inventors found out that the grayish black effect becomes remarkable in the case where the light emitting element 105 continues to operate with a forward bias voltage.

The invention provides a display device which can perform a clear display by reducing grayish black effect and increasing contrast, and a driving method thereof.

In order to reduce the grayish black effect, the display device and driving method of the invention employ a following first configuration or second configuration.

[First Configuration]

In the case where a first electrode of a light emitting element is an anode and a second electrode thereof is a cathode, a potential of a second power source line is set so that a potential of the first electrode becomes equal to or higher than that of the second electrode and that a voltage applied between the first electrode and the second electrode becomes smaller than a threshold voltage of the light emitting element when a first thin film transistor connected in series to the light emitting element is selected to be turned off.

In the case where a first electrode of a light emitting element is a cathode and a second electrode thereof is an anode, a potential of a second power source line is set so that a potential of the first electrode becomes equal to or lower than that of the second electrode and that a voltage applied between the first electrode and the second electrode becomes smaller than a threshold voltage of the light emitting element when a first thin film transistor connected in series to the light emitting element is selected to be turned off.

[Second Configuration]

In the case where a first electrode of a light emitting element is an anode and a second electrode thereof is a cathode, a second thin film transistor is provided which is different than a first thin film transistor connected in series to the light emitting element. One of a source and drain of the second thin film transistor is connected to the first electrode of the light emitting element and the other is connected to a power source line. When the first thin film transistor is selected to be turned off, the second thin film transistor is selected to be turned on and a potential of the power source line is set equal to or higher than a potential of the second electrode of the light emitting element and lower than a potential obtained by adding the potential of the second electrode to a threshold voltage of the light emitting element.

In the case where the first electrode of the light emitting element is a cathode and the second electrode thereof is an anode, a second thin film transistor is provided which is different than the first thin film transistor connected in series to the light emitting element. One of a source and drain of the second thin film transistor is connected to the first electrode of the light emitting element and the other is connected to the power source line. When the first thin film transistor is selected to be turned off, the second thin film transistor is selected to be turned on and a potential of the power source line is set equal to or lower than a potential of the second electrode of the light emitting element and higher than a potential obtained by subtracting a threshold voltage of the light emitting element from the potential of the second electrode.

It is to be noted that the power source line connected to the second thin film transistor can be shared as a power source line connected to the second electrode of the light emitting element.

According to the first and second configuration, a thin film transistor having an active layer formed of a polycrystalline semiconductor can be used as the first thin film transistor.

According to the first and second configuration, a third configuration described next can be used in combination.

[Third Configuration]

A capacitor is provided to be connected in parallel to a light emitting element.

That is, the capacitor is provided so that one electrode is connected to a first electrode of the light emitting element and the other electrode is connected to a second electrode of the light emitting element.

According to a display device and a driving method thereof of the invention, when a thin film transistor connected in series to a light emitting element is selected to be turned off so that a light emitting element emits no light, a charge corresponding to a threshold voltage held in the capacitance of the light emitting element itself can be discharged. Accordingly, when an off current is generated in the thin film transistor connected in series to the light emitting element, the off current flows to charge the capacitance of the light emitting element itself until the capacitance of the light emitting element itself holds a threshold voltage again. Therefore, the off current of the thin film transistor does not contribute to light emission for a while after the thin film transistor connected in series to the light emitting element is selected to be turned off. In this manner, a grayish black effect can be reduced. Accordingly, according to the display device and the driving method thereof of the invention, a clear display can be performed by increasing the contrast of the display.

According to the first and second configurations, when the thin film transistor connected in series to the light emitting element is selected to be turned off so that the light emitting element emits no light, a forward bias voltage is applied between the electrodes of the light emitting element and the voltage is set lower than the threshold voltage of the light emitting element. According to both of the first and second configurations, a reverse bias voltage is not applied to the light emitting element. Accordingly, compared to a method for regularly applying a reverse bias voltage to the light emitting element, power consumption can be reduced according to the display device and the driving method thereof of the invention.

According to the second configuration, the power source line connected to the second thin film transistor is shared as a power source line connected to the second electrode of the light emitting element, thereby the number of wiring lines can be reduced and an aperture ratio of pixel can be improved.

Compared to a thin film transistor having an active layer formed of a single crystalline semiconductor or an amorphous semiconductor, a thin film transistor having an active layer formed of a polycrystalline semiconductor produces more off current due to a crystal grain boundary and the like. Therefore, the invention is efficient particularly in the case of using a thin film transistor having an active layer formed of a polycrystalline semiconductor as a first thin film transistor.

By using the first and second configurations in combination, an off current of the thin film transistor connected in series to the light emitting element continues to flow to the capacitor until it is charged. Therefore, longer time can be taken after selecting to turn off the thin film transistor connected in series to the light emitting element until the off current of the thin film transistor starts to contribute to the light emission. In this manner, a grayish black effect can further be reduced.

As described above, the invention provides a display device which can perform a clear display with a higher contrast and less power consumption, and a driving method thereof.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 1C are diagrams showing Embodiment Mode 1 of the invention.

FIGS. 2A to 2C are diagrams showing Embodiment Mode 2 of the invention.

FIGS. 3A to 3D are diagrams showing Embodiment Mode 3 of the invention.

FIGS. 4A to 4D are diagrams showing Embodiment Mode 4 of the invention.

FIGS. 5A to 5D are diagrams showing Embodiment 1 of the invention.

FIGS. 6A and 6B are diagrams showing Embodiment 2 of the invention.

FIGS. 7A and 7B are diagrams showing Embodiment 3 of the invention.

FIGS. 8A and 8B show conventional configurations and FIGS. 8C to 8E show configurations of a light emitting element.

FIGS. 9A to 9D are diagrams showing Embodiment 10 of the invention.

FIG. 10 is a diagram showing Embodiment 4.

FIG. 11 is a diagram showing Embodiment 5.

FIGS. 12A to 12C are diagrams showing Embodiment 6.

FIGS. 13A to 13C are diagrams showing Embodiment 7.

FIGS. 14A to 14C are diagrams showing Embodiment 8.

FIGS. 15A to 15C are diagrams showing Embodiment 9.

DETAILED DESCRIPTION OF THE INVENTION

Although the present invention will be fully described by way of Embodiment Modes and Embodiments with reference to the accompanying drawings, it is to be understood that various changes and modifications will be apparent to those skilled in the art. Therefore, unless otherwise such changes and modifications depart from the scope of the invention, they should be construed as being included therein. Note that identical portions in embodiment modes and embodiments are denoted by the same reference numerals and detailed descriptions thereof are omitted.

Embodiment Mode 1

An example in which the first and third configurations are used in combination is described with reference to FIGS. 1A to 1C. In FIGS. 1A to 1C, reference numeral 105 denotes a light emitting element, 102 denotes a thin film transistor, 103 denotes a first power source line, 104 denotes a second power source line, 101 denotes a capacitor, and 106 denotes a circuit for setting a potential. The circuit 106 for setting a potential corresponds to the first configuration. The capacitor 101 corresponds to the third configuration. The light emitting element 105 has two electrodes and emits light at a luminance according to a current value of a current flowing between the two electrodes. One of the two electrodes of the light emitting element 105 is referred to as a first electrode 105 a while the other is referred to as a second electrode 105 b.

A method for using the first and third configurations in combination is described with reference to FIG. 1A.

When the thin film transistor 102 connected in series to the light emitting element 105 is selected to be turned off, the circuit 106 for setting a potential changes a potential of the second power source line 104 so that a forward bias voltage is applied between electrodes of the light emitting element 105 and the voltage becomes lower than the threshold voltage of the light emitting element 105. In this manner, a charge held in the capacitance of the light emitting element 105 itself is discharged to reduce slight light emission of the light emitting element 105.

When the thin film transistor 102 connected in series to the light emitting element 105 is selected to be turned on, the circuit 106 for setting a potential changes a potential of the second power source line 104 so that a forward bias voltage is applied between electrodes of the light emitting element 105 and the voltage becomes higher than the threshold voltage of the light emitting element 105. A drain current of the thin film transistor 102 which flows according to a potential G1 applied to a gate thereof flows to the light emitting element 105. The light emitting element 105 emits light at a luminance according to the drain current. In this manner, the luminance of the light emitting element 105 is controlled to perform a display.

The circuit 106 for setting a potential can have, for example, a configuration including a switch and two terminals (referred to as a first terminal and a second terminal) which are applied different potentials. The switch selects a connection between the first terminal and the second power source line 104 or a connection between the second terminal and the second power source line 104. When the thin film transistor 102 is selected to be turned off, the switch connects the first terminal and the second power source line 104 while the switch connects the second terminal and the second power source line 104 when the thin film transistor 102 is selected to be turned on. The first terminal is applied such a voltage as to apply a forward bias voltage between the electrodes of the light emitting element 105 in relation to a potential applied to the first power source line 103 and set the applied voltage lower than the threshold voltage of the light emitting element 105. The second terminal is applied such a voltage as to apply a forward bias voltage between the electrodes of the light emitting element 105 in relation to a potential applied to the first power source line 103 and set the applied voltage higher than the threshold voltage of the light emitting element 105.

A gray scale can be displayed by controlling the time in which the light emitting element 105 emits light in one frame period.

One electrode of the capacitor 101 is connected to the first electrode 105 a while the other electrode is connected to the second electrode 105 b. That is, the capacitor 101 is connected in parallel to the light emitting element 105. An off current of the thin film transistor 102 connected in series to the light emitting element 105 flows to the capacitor 101 provided additionally until it is charged. Therefore, longer time can be taken after turning off the thin film transistor 102 connected in series to the light emitting element 105 until the off current of the thin film transistor 102 starts to contribute to the light emission. In this manner, a grayish black effect can further be reduced.

An electroluminescence element and the like can be used as the light emitting element 105. The electroluminescence element has diode characteristics to flow a current in only one direction. Each of FIGS. 1B and 1C shows the light emitting element 105 in FIG. 1A as a diode. In FIG. 1B, the first electrode 105 a is an anode and the second electrode 105 b is a cathode. In FIG. 1C, the first electrode 105 a is a cathode and the second electrode 105 b is an anode.

The circuit 106 for setting a potential in FIG. 1B is described.

When the thin film transistor 102 is selected to be turned on, a potential of the second power source line 104 is set so that a potential of the first electrode 105 a becomes higher than that of the second electrode 105 b and a voltage applied between the first electrode 105 a and the second electrode 105 b becomes higher than the threshold voltage of the light emitting element 105, thereby the light emitting element 105 emits light.

When the thin film transistor 102 is selected to be turned off, a potential of the second power source line 104 is set so that a potential of the first electrode 105 a becomes equal to or higher than that of the second electrode 105 b and a voltage applied between the first electrode 105 a and the second electrode 105 b becomes lower than the threshold voltage of the light emitting element 105, thereby the light emitting element 105 emits no light.

The circuit 106 for setting a potential in FIG. 1C is described.

When the thin film transistor 102 is selected to be turned on, a potential of the second power source line 104 is set so that a potential of the first electrode 105 a becomes lower than that of the second electrode 105 b and a voltage applied between the first electrode 105 a and the second electrode 105 b becomes higher than the threshold voltage of the light emitting element 105, thereby the light emitting element 105 emits light.

When the thin film transistor 102 is selected to be turned off, a potential of the second power source line 104 is set so that a potential of the first electrode 105 a becomes equal to or lower than that of the second electrode 105 b and a voltage applied between the first electrode 105 a and the second electrode 105 b is lower than the threshold voltage of the light emitting element 105, thereby the light emitting element 105 emits no light.

Embodiment Mode 2

An example of using the second and third configurations in combination is described with reference to FIGS. 2A to 2C. In FIGS. 2A to 2C, the same reference numerals are used for the same portions as in FIGS. 1A to 1C, and a description thereon is omitted. Reference numeral 107 denotes a thin film transistor. The thin film transistor 107 and a third power source line 204 correspond to the second configuration. The capacitor 101 corresponds to the third configuration.

A method for using the second and third configurations in combination is described in details with reference to FIG. 2A.

When the thin film transistor 102 connected in series to the light emitting element 105 is selected to be turned off, the thin film transistor 107 is selected to be turned on by controlling a potential G2 applied to a gate thereof. In this manner, a potential of the third power source line 204 is applied to the first electrode 105 a. When the thin film transistor 107 is selected to be turned on, a potential difference between the second power source line 104 and the third power source line 204 is set zero or higher and lower than the threshold voltage of the light emitting element 105. In this manner, a charge held in the capacitance of the light emitting element 105 itself is discharged to reduce slight light emission of the light emitting element 105.

The second power source line 104 and the third power source line 204 can be shared as well. In this manner, an aperture ratio of pixel can be improved by reducing the number of wirings.

The thin film transistor 107 is selected to be turned off by controlling the potential G2 applied to a gate when the thin film transistor 102 connected in series to the light emitting element 105 is selected to be turned on. A drain current of the thin film transistor 102 which flows according to the potential G1 applied to the gate thereof flows to the light emitting element 105. The light emitting element 105 emits light at a luminance according to the drain current. In this manner, the luminance of the light emitting element 105 is controlled to perform a display.

A gray scale can be displayed by controlling the time in which the light emitting element 105 emits light in one frame period.

By providing the capacitor 101, longer time can be taken after selecting to turn off the thin film transistor 102 connected in series to the light emitting element 105 until the off current of the thin film transistor 102 starts to contribute to the light emission. In this manner, a grayish black effect can further be reduced.

An electroluminescence element and the like can be used as the light emitting element 105. The electroluminescence element has diode characteristics to flow a current in only one direction. Each of FIGS. 2B and 2C shows the light emitting element 105 in FIG. 2A as a diode. In FIG. 2B, the first electrode 105 a is an anode and the second electrode 105 b is a cathode. In FIG. 2C, the first electrode 105 a is a cathode and the second electrode 105 b is an anode.

Embodiment Mode 3

An example of using the first and third configurations in combination is described with reference to FIGS. 3A to 3D. In FIGS. 3A to 3D, the same reference numerals are used for the same portions as in FIGS. 1A to 1C and a description thereon is omitted.

Each of FIGS. 3A and 3B corresponds to FIG. 1A provided with the capacitor 108. The capacitor 108 is provided to hold a gate-source voltage of the thin film transistor 102. FIG. 3A shows an example where the thin film transistor 102 has a source on a side connected to the first power source line 103. FIG. 3B shows an example where the thin film transistor 102 has a source on a side connected to the first electrode 105 a of the light emitting element 105.

A drain current of the thin film transistor 102 changes according to a potential difference between a source potential thereof and the gate potential G1. Even if the gate potential G1 of the thin film transistor 102 is controlled, when a source potential changes, a potential difference between the source potential and the gate potential changes, which changes the drain current. Accordingly, it is preferable to keep the source potential of the thin film transistor 102 constant. Therefore, it is preferable that the thin film transistor 102 have a source on a side connected to the first power source line 103 as shown in FIG. 3A.

Each of FIGS. 3C and 3D corresponds to FIG. 3A in which the light emitting element 105 is shown as a diode. The first electrode 105 a is an anode and the second electrode 105 b is a cathode in FIG. 3C. The first electrode 105 a is a cathode and the second electrode 105 b is an anode in FIG. 3D.

In FIG. 3C, a current flows from the first power source line 103 in a direction to the second power source line 104, thereby the light emitting element 105 emits light. A potential of the thin film transistor 102 on a side connected to the first power source line 103 becomes higher than that on a side connected to the first electrode 105 a of the light emitting element 105. A p-channel transistor is used as the thin film transistor 102 so that the thin film transistor 102 has a source on the side connected to the first power source line 103.

In FIG. 3D, a current flows from the second power source line 104 in a direction to the first power source line 103, thereby the light emitting element 105 emits light. A potential of the thin film transistor 102 on the side connected to the first electrode 105 a of the light emitting element 105 becomes higher than that on the side connected to the first power source line 103. An n-channel transistor is used as the thin film transistor 102 so that the thin film transistor 102 has a source on the side connected to the first power source line 103.

Embodiment Mode 4

An example of using the second and third configurations in combination is described with reference to FIGS. 4A to 4D. In FIGS. 4A to 4D, the same reference numerals are used for the same portions as in FIGS. 2A to 3D.

Each of FIGS. 4A and 4B corresponds to FIG. 2A provided with the capacitor 108. The capacitor 108 is provided to hold a gate-source voltage of the thin film transistor 102. FIG. 4A shows an example where the thin film transistor 102 has a source on a side connected to the first power source line 103. FIG. 4B shows an example where the thin film transistor 102 has a source on a side connected to the first electrode 105 a of the light emitting element 105.

FIG. 4A is preferable in that the thin film transistor 102 has a source on the side connected to the first power source line 103 similarly to FIG. 3A.

Each of FIGS. 4C and 4D corresponds to FIG. 4A in which the light emitting element 105 is shown as a diode. The first electrode 105 a is an anode and the second electrode 105 is a cathode in FIG. 4C. The first electrode 105 a is a cathode and the second electrode 105 b is an anode in FIG. 4D.

In FIG. 4C, a p-channel transistor is used as the thin film transistor 102 so that the thin film transistor 102 has a source on the side connected to the first power source line 103. In FIG. 4D, an n-channel transistor is used as the thin film transistor 102 so that the thin film transistor 102 has a source on the side connected to the first power source line 103.

Embodiment 1

A specific example of a pixel using a configuration described in embodiment modes is described with reference to FIGS. 5A to 5D. In FIGS. 5A to 5D, the same reference numerals are used for the same portions as in FIGS. 1A to 4D, and a description thereon is omitted.

FIG. 5A shows the configuration of FIG. 1A showing a specific example of a circuit for inputting the potential G1 to the gate of the thin film transistor 102. FIG. 5B shows the configuration of FIG. 2A showing a specific example of a circuit for inputting the potential G1 to the gate of the thin film transistor 102. FIG. 5C shows the configuration of FIG. 3A showing a specific example of a circuit for inputting the potential G1 to the gate of the thin film transistor 102. FIG. 5D shows the configuration of FIG. 4A showing a specific example of a circuit for inputting the potential G1 to the gate of the thin film transistor 102.

In FIGS. 5A to 5D, reference numeral 500 denotes a pixel, 501 denotes a thin film transistor, 502 denotes a signal line, and 503 denotes a scan line. One of a source and drain of the thin film transistor 501 is connected to the signal line 502 while the other is connected to the gate of the thin film transistor 102. A gate of the thin film transistor 501 is connected to the scan line 503.

In the configurations shown in FIGS. 5A to 5D, when the thin film transistor 501 is selected to be turned on by a signal inputted to the scan line 503, a signal inputted to the signal line 502 is inputted to the gate of the thin film transistor 102. In this manner, on/off of the thin film transistor 102 and a value of a drain current thereof when turned on are controlled.

In FIG. 5A, an operation of the circuit 106 for setting a potential in each of the case where the thin film transistor 102 is selected to be turned on and the case where the thin film transistor 102 is selected to be turned off is similar to Embodiment Mode 1. In FIG. 5B, an operation of the thin film transistor 107 in each of the case where the thin film transistor 102 is turned on and the case where the thin film transistor 102 is selected to be turned off is similar to Embodiment Mode 2. In FIG. 5C, an operation of the circuit 106 for setting a potential in each of the case where the thin film transistor 102 is selected to be turned on and the case where the thin film transistor 102 is selected to be turned off is similar to Embodiment Mode 3. In FIG. 5D, an operation of the thin film transistor 107 in each of the case where the thin film transistor 102 is selected to be turned on and the case where the thin film transistor 102 is selected to be turned off is similar to Embodiment Mode 4.

Embodiment 1 can be freely implemented in combination with embodiment modes.

Embodiment 2

A different example than the example of the pixel shown in Embodiment 1 is described with reference to FIGS. 6A and 6B. In FIGS. 6A and 6B, the same reference numerals are used for the same portions as in FIGS. 1A to 5D, and a description thereon is omitted.

FIG. 6A shows the configuration of FIG. 5C in which a circuit for selecting to turn off the thin film transistor 102 independent of a signal of the signal line 502 is provided. FIG. 6B shows the configuration of FIG. 5D in which a circuit for selecting to turn off the thin film transistor 102 independent of a signal of the signal line 502 is provided.

In FIGS. 6A and 6B, reference numeral 601 denotes a thin film transistor. One of a source and drain of the thin film transistor 601 is connected to one electrode of the capacitor 108 and the other is connected to the other electrode of the capacitor 108.

In the configurations shown in FIGS. 6A and 6B, the thin film transistor 601 is selected to be turned on by a potential G3 inputted to a gate thereof so that two electrodes of the capacitor 108 have approximately the same potentials. The charge held in the capacitor 108 is discharged, thereby a potential difference between the source and gate of the thin film transistor 102 becomes approximately zero. In this manner, the thin film transistor 102 is selected to be turned off.

According to the second configuration, when the thin film transistor 102 connected in series to the light emitting element 105 is selected to be turned off, the thin film transistor 107 is selected to be turned on. Accordingly, a timing to select to turn on the thin film transistor 601 and a timing to select to turn on the thin film transistor 107 in FIG. 6B can be the same. Therefore, the thin film transistors 107 and 601 can have the same polarity and gates thereof can be connected to the same wiring, thereby signals can be inputted thereto at the same time. A wiring for inputting a signal to the gate of the thin film transistor 107 and a wiring for inputting a signal to the gate of the thin film transistor 601 can be shared, which can improve an aperture ratio of pixels.

This embodiment mode can be freely implemented in combination with embodiment modes.

Embodiment 3

Another example than the examples of the pixel described in Embodiments 1 and 2 is described with reference to FIGS. 7A and 7B. In FIGS. 7A and 7B, the same reference numerals are used for the same portions as in FIGS. 1A to 6B.

FIG. 7A shows a specific example of a circuit for inputting the potential G1 to the gate of the thin film transistor 102 in the configuration of FIG. 3A. FIG. 7B shows a specific example of a circuit for inputting the potential G1 to the gate of the thin film transistor 102 in the configuration of FIG. 4A.

In FIGS. 7A and 7B, reference numerals 701, 702, and 703 denote thin film transistors, 704 denotes a signal line, and 705 denotes a scan line. One of a source and drain of the thin film transistor 702 is connected to the signal line 704 and the other is connected to one of a source and drain of the thin film transistor 701 and one of a source and drain of the thin film transistor 703. A gate of the thin film transistor 702 is connected to the scan line 705. The other of the source and drain of the thin film transistor 701 is connected to the first power source line 103. The other of the source and drain of the thin film transistor 703 is connected to the gate of the thin film transistor 102. A gate of the thin film transistor 701 is connected to the gate of the thin film transistor 102.

In FIGS. 7A and 7B, the thin film transistor 703 is provided on the path between the gate of the thin film transistor 102 and one of the source and drain of the thin film transistor 701, however, it may be provided in another place such as on the path between the gate of the thin film transistor 701 and the second capacitor 108.

In the configurations shown in FIGS. 7A and 7B, the thin film transistor 702 is selected to be turned on by a signal inputted to the scan line 705, and the thin film transistor 703 is selected to be turned on by the potential G4 inputted to the gate thereof, thereby a voltage corresponding to the signal inputted to the signal line 704 is held in the capacitor 108. In this manner, on/off of the thin film transistor 102 and a value of a drain current thereof when turned on are controlled.

Operations of the pixels having the configurations shown in FIGS. 7A and 7B are further described. The signal line 704 is inputted with a current having a predetermined current value (hereinafter referred to as a signal current). When the thin film transistors 702 and 703 are selected to be turned on, a signal current flows through the thin film transistors 702 and 703 to charge the capacitor 108. In this manner, a voltage (hereinafter referred to as a voltage corresponding to the signal current) is held in the capacitor 108 so that the thin film transistor 701 supplies a drain current of the same amount as the signal current. A potential difference between the gate and source of the thin film transistor 701 and a potential difference between the gate and source of the thin film transistor 102 are equal. Provided that the thin film transistors 701 and 102 have the same polarity, approximately equal ratios of channel width to channel length, and approximately the same characteristics, the thin film transistor 102 supplies a drain current of approximately the same amount as the signal current. In this manner, a current supplied to the light emitting element 105 is controlled to perform a display.

After the thin film transistor 702 is selected to be turned off and a signal current is not inputted from the signal line to the pixel, a voltage corresponding to the signal current is held in the capacitor 108. Accordingly, even after the signal current is not inputted from the signal line to the pixel, the thin film transistor 102 supplies a drain current of approximately the same amount as the signal current. It is to be noted that it is preferable that the thin film transistor 703 be selected to be turned off before or at the same time as the thin film transistor 702 is selected to be turned off. If the thin film transistor 702 is selected to be turned off with the thin film transistor 703 being on, a charge held in the capacitor 108 is discharged and a voltage corresponding to the signal current cannot be held anymore.

The thin film transistors 702 and 703 can be selected to be turned on/off at the same time. Accordingly, the thin film transistors 702 and 703 can have the same polarity and the gate of the thin film transistor 703 can be connected to the scan line 705. A wiring for inputting a signal to the gate of the thin film transistor 702 and a wiring for inputting a signal to the gate of the thin film transistor 703 can be shared, which can improve an aperture ratio of pixels.

In FIG. 7A, an operation of the circuit 106 for setting a potential in each of the case where the thin film transistor 102 is selected to be turned on and the case where the thin film transistor 102 is selected to be turned off is similar to Embodiment Mode 3. In FIG. 7B, an operation of the thin film transistor 107 in each of the case where the thin film transistor 102 is selected to be turned on and the case where the thin film transistor 102 is selected to be turned off is similar to Embodiment Mode 4.

Embodiment 3 can be freely implemented in combination with embodiment modes.

Embodiment 4

A specific example of a pixel configuration is described. FIG. 10 is a cross sectional diagram showing a pixel configuration of the invention. Reference numeral 1000 denotes a substrate, 1001 denotes a base film, 1002 denotes a semiconductor layer, 1003 denotes a first insulating film, 1004 denotes a gate electrode, 1005 denotes a second insulating film, 1006 denotes an electrode, 1007 denotes a first electrode, 1008 denotes a third insulating film, 1009 denotes a light emitting layer, and 1010 denotes a second electrode. Reference numeral 1100 denotes a thin film transistor, 1011 denotes a light emitting element, and 1012 denotes a capacitor.

The substrate 1000 may be formed of a glass substrate such as a barium borosilicate glass and aluminoborosilicate glass, a quartz substrate, a ceramic substrate and the like. Further, a metal substrate containing stainless steel or a semiconductor substrate each of which has an insulating film over the surface may be used as well. A substrate formed of a flexible synthetic resin such as plastic may also be used. A surface of the substrate 1000 may be planarized by polishing by a CMP method and the like.

The base film 1001 may be formed of an insulating film such as silicon oxide, silicon nitride or silicon nitride oxide. By providing the base film 1001, it can be prevented that an alkaline metal such as Na and an alkaline earth metal in the substrate 1000 are dispersed into the semiconductor layer 1002 and adversely affect characteristics of the thin film transistor 1100. In FIG. 10, the base film 1001 has a single layer structure; however, two layers or a plurality of layers more than two may be formed as well. It is to be noted that the base film 1001 is not necessarily provided in the case where the dispersion of impurities is not a big problem, such as the case of using a quartz substrate.

The semiconductor layer 1002 may be formed of a patterned crystalline semiconductor film or amorphous semiconductor film. The crystalline semiconductor film can be obtained by crystallizing an amorphous semiconductor film. A crystallizing method may be a laser crystallizing method, a thermal crystallizing method using RTA or an annealing furnace, a thermal crystallizing method using a metal catalyst which promotes crystallization and the like. The semiconductor layer 1002 has a channel forming region and a pair of impurity regions which are added impurity elements which impart conductivity. It is to be noted that an impurity region which is added impurity elements at a low concentration may be provided between the channel forming region and the pair of impurity regions.

The first insulating film 1003 can be formed of a single layer or a plurality of stacked layers, using silicon oxide, silicon nitride or silicon nitride oxide and the like.

The gate electrode 1004 can be formed of a single layer structure or a stacked-layer structure of an alloy or compound containing one or a plurality of elements selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd. For example, stacked layers of TaN and W can be used as the gate electrode 1004. A semiconductor film represented by a polycrystalline silicon film which is added impurity elements which imparts conductivity may be used as well.

The thin film transistor 1100 is formed of the semiconductor layer 1002, the gate electrode 1004, and the first insulating film 1003 between the semiconductor layer 1002 and the gate electrode 1004. In FIG. 10, only the thin film transistor 1100 connected to the first electrode 1007 of the light emitting element 1011 is shown, however, a plurality of thin film transistors may be provided as well. Moreover, the thin film transistor 1100 is shown as a top gate transistor in this embodiment, however, a bottom gate transistor having a gate electrode beneath the semiconductor layer or a dual gate transistor having gate electrodes above and beneath the semiconductor layer may be employed as well.

The second insulating film 1005 may be formed of a single layer or stacked layers of an inorganic insulating film and an organic insulating film. As the inorganic insulating film, a silicon oxide film formed by a CVD method, a SOG (Spin On Glass) method and the like can be used. As the organic insulating film, a film such as polyimide, polyamide, BCB (benzocyclobutene), acrylic or a positive photosensitive organic resin, and a negative photosensitive organic resin can be used.

Further, a material having a backbone structure of Si (silicon)—O (oxygen) bond can be used for the second insulating film 1005 as well. As a substituent for this material, an organic group (for example and an alkyl group, aromatic carbon hydride) containing at least hydrogen is used. As the substituent, a fluoro group may be used as well. Moreover, a fluoro group and an organic group containing at least hydrogen may also be used.

The electrode 1006 may be formed of a single layer structure or a stacked-layer structure of an alloy containing one or a plurality of elements selected from Al, Ni, C, W, Mo, Ti, Pt, Cu, Ta, Au, and Mn. For example, a metal film Ti/Al/Ti formed by stacking Al and Ti can be used as the electrode 1006. Further, an end portion of the electrode 1006 formed over the second insulating film 1005 may be tapered, which can prevent a break of a film formed thereover.

One or both of the first electrode 1007 and the second electrode 1010 can be a light transmissive electrode. As the light transmissive electrode, a light transmissive oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), and zinc oxide which is added gallium (GZO) can be used. Alternatively, ITO and ITO containing silicon (hereinafter referred to as ITSO), ITO and ITO containing titanium oxide (hereinafter referred to as ITSO), ITO and ITO containing molybdenum oxide (hereinafter referred to as ITMO), no which is added titanium, molybdenum, or gallium, and indium oxide containing silicon oxide which is added 2 to 20% of zinc oxide (ZnO) may be used as well.

The other of the first electrode 1007 and the second electrode 1010 may be formed of a material which does not transmit light. For example, an alkaline metal such as Li and Cs, an alkaline earth metal such as Mg, Ca, and Sr, an alloy containing these (Mg:Ag, Al:Li, Mg:In and the like) and a compound thereof (CaF₂ and calcium nitride), and a rare earth metal such as Yb and Er can be used.

The third insulating film 1008 can be formed using a similar material to that of the second insulating film 1005. The third insulating film 1008 is formed in the periphery of the first electrode 1007 so as to cover an end portion of the first electrode 1007, and functions as a bank for separating the light emitting layer 1009 between adjacent pixels.

The light emitting layer 1009 is formed of a single layer or a plurality of layers. In the case where the light emitting layer 1009 is formed of a plurality of layers, these layers can be categorized into a hole injecting layer, a hole transporting layer, a light emitting layer, an electron transporting layer, an electron injecting layer and the like in view of a carrier transporting property. It is to be noted that a boundary between each layer is not necessarily clear, but an interface may be unclear when materials forming each layer are partly mixed. For the each layer, an organic material and an inorganic material can be used. As the organic material, any one of a high molecular weight, medium molecular weight, and low molecular weight materials can be used. It is to be noted that the medium molecular weight material corresponds to an oligomer of which structure includes about 2 to 20 repetition (polymerization degree) of a single constitutional unit.

The light emitting element 1011 is formed of the light emitting layer 1009, and the first electrode 1007 and the second electrode 1010 with the light emitting layer 1009 interposed therebetween. One of the first electrode 1007 and the second electrode 1010 corresponds to an anode while the other corresponds to a cathode. The light emitting element 1011 emits light when a forward bias voltage higher than a threshold voltage thereof is applied between the anode and cathode thereof and a current flows from the anode to the cathode.

The capacitor 1012 is formed of the third insulating film 1008, and the first electrode 1007 and the second electrode 1010 with the third insulating film 1008 interposed therebetween. The capacitor 1012 corresponds to the capacitor in the third configuration of the invention, that is the capacitor 101 in embodiment modes and Embodiments 1 to 3.

This embodiment can be freely implemented in combination with embodiment modes and Embodiments 1 to 3.

Embodiment 5

A specific example of a pixel configuration which is different than Embodiment 4 is described. It is to be noted that the same portions as FIG. 10 are denoted by the same reference numerals and a description thereon is omitted.

In a configuration of FIG. 11, the third insulating film 1008 of a portion overlapped with the first electrode 1007 is formed thin. A capacitor 1112 is formed of the third insulating film 1008, and the first electrode 1007 and the second electrode 1010 with the third insulating film 1008 interposed therebetween. The capacitor 1112 corresponds to the capacitor in the third configuration of the invention, that is the capacitor 101 in embodiment modes and Embodiments 1 to 3. The capacitor 1112 requires a smaller area for an electrode to obtain the same capacitance compared to the capacitor 1012 of Embodiment 4. In this manner, an aperture ratio of pixels can be improved.

This embodiment can be freely implemented in combination with embodiment modes and Embodiments 1 to 3.

Embodiment 6

A specific example of a pixel configuration which is different than Embodiments 4 and 5 is described. Each of FIGS. 12A to 12C shows a cross sectional diagram showing a pixel configuration of the invention. It is to be noted that the same portions as FIG. 10 are denoted by the same reference numerals and a description thereon is omitted.

In the configuration of FIG. 12A, the capacitor 1212 is formed of the third insulating film 1008, and the electrode 1006 and the second electrode 1010 with the third insulating film 1008 interposed therebetween. The capacitor 1212 corresponds to the capacitor in the third configuration of the invention, that is the capacitor 101 in embodiment modes and Embodiments 1 to 3.

As described in Embodiment 4, the electrode 1006 can be formed of stacked layers. Each of FIGS. 12B and 12C shows an example of the electrode 1006 having a stacked-layer structure. The electrode 1006 is formed of a first layer 1206 a, a second layer 1206 b, and a third layer 1206 c. For example, Ti can be used for the first layer 1206 a, Al can be used for the second layer 1206 b, and Ti can be used for the third layer 1206 c.

In FIGS. 12B and 12C, portions of the second layer 1206 b and the third layer 1206 c which are overlapped with the first layer 1206 a are removed, and a portion of the first layer 1206 a only remains (hereinafter referred to as an extended portion of the first layer 1206 a). A capacitor 1213 is formed of the third insulating film 1008, and the extended portion of the first layer 1206 a and the second electrode 1010 with the third insulating film 1008 interposed therebetween. The capacitor 1213 corresponds to the capacitor in the third configuration of the invention, that is the capacitor 101 in embodiment modes and Embodiments 1 to 3.

As the capacitor 1213 is formed in the extended portion of the first layer 1206 a without the second layer 1206 b in the configurations of FIGS. 12B and 12C, a defect such as a short-circuit between electrodes can be reduced even when the second layer 1206 b has poor planarity. Accordingly, the configurations shown in FIGS. 12B and 12C are effective in particular in the case where a material having a relatively low electric resistance but poor planarity is used for the second layer 1206 b and a material having a relatively high electric resistance but good planarity is used for the first layer 1206 a and the third layer 1206 c. For example, these configurations are effective in the case where Al is used for the second layer 1206 b and Ti is used for the first layer 1206 a and the third layer 1206 c.

In FIG. 12C, the first layer 1206 a and the first electrode 1007 are connected at the extended portion of the first layer 1206 a. The electrode 1006 of a portion overlapped with the first electrode 1007 is formed thin, which can prevent a break of the first electrode 1007 and ensure a connection between the first electrode 1007 and the electrode 1006.

This embodiment can be freely implemented in combination with embodiment modes and Embodiments 1 to 5.

Embodiment 7

A specific example of a pixel having a different configuration than Embodiments 4 to 6 is described. FIG. 13 is a cross sectional diagram showing a pixel configuration of the invention. It is to be noted that the same portions as FIGS. 10A to 12C are denoted by the same reference numerals and a description thereon is omitted.

In the configuration of FIG. 13A, the third insulating film 1008 of a portion overlapped with the electrode 1006 (or the extended portion of the first layer 1206 a) is formed thin. A capacitor 1312 is formed of the third insulating film 1008, and the electrode 1006 and the second electrode 1010 with the third insulating film 1008 interposed therebetween. The capacitor 1312 corresponds to the capacitor in the third configuration, that is the capacitor 101 in embodiment modes and Embodiments 1 to 3. The capacitor 1312 requires a smaller area for an electrode to obtain the same capacitance, which can improve an aperture ratio of pixel.

In FIGS. 13B and 13C, a capacitor 1313 is formed of the third insulating film 1008, and the extended portion of the first layer 1206 a and the second electrode 1010 with the third insulating film 1008 interposed therebetween. The capacitor 1313 corresponds to the capacitor in the third configuration of the invention, that is the capacitor 101 in embodiment modes and Embodiments 1 to 3.

In FIG. 13C, the first layer 1206 a and the first electrode 1007 are connected at the extended portion of the first layer 1206 a.

Effects of FIGS. 13B and 13C are similar to those of FIGS. 12B and 12C of Embodiment 6. Further, the capacitor 1313 in FIGS. 13B and 13C requires a smaller area for an electrode to obtain the same capacitance as compared to the capacitor 1213 in FIGS. 12B and 12C. In this manner, an aperture ratio of pixel can be improved.

This embodiment can be freely implemented in combination with embodiment modes and Embodiments 1 to 5.

Embodiment 8

Description is made with reference to FIGS. 14A to 14C on a manufacturing method of the third insulating film 1008 of which portion is formed thin described in Embodiments 5 and 7. In FIGS. 14A to 14C, the same portions as in FIG. 11 are denoted by the same reference numerals and a description thereon is omitted.

In FIG. 14A, after forming the first electrode 1007, an insulating film 1408 is formed. A photosensitive material is used for the insulating film 1408. The insulating film 1408 is exposed by using a photo mask 1400. The photo mask 1400 is provided with a first light transmissive portion 1401, a second light transmissive portion 1402, and a light shielding portion 1403. The first light transmissive portion 1401 may be an aperture. The intensity of light transmitting through the photo mask 1400 is lower in the second light transmissive portion 1402 than in the first light transmissive portion 1401. The light shielding portion 1403 does not transmit light almost at all. A half-tone mask as described above is used as the photo mask 1400.

In FIG. 14B, the insulating film 1408 is developed. The insulating film 1408 of a portion overlapped with the light shielding portion 1403 is barely etched. The insulating film 1408 of a portion exposed through the first light transmissive portion 1401 is largely etched. In this manner, an aperture portion 1411 in which a surface of the first electrode 1007 is exposed is formed. The insulating film 1408 of a portion exposed through the second light transmissive portion 1402 is etched to some extent. In this manner, a thin portion 1412 is formed in the insulating film 1408. In this manner, the insulating film 1408 having a thin portion is obtained. The insulating film 1408 in FIG. 14B corresponds to the third insulating film 1008 described in Embodiments 5 and 7.

In FIG. 14C, the light emitting layer 1009 and the second electrode 1010 are sequentially formed.

This embodiment can be freely implemented in combination with embodiment modes and Embodiments 1 to 7.

Embodiment 9

Description is made with reference to FIGS. 15A to 15C on a manufacturing method of the third insulating film 1008 of which portion is formed thin described in Embodiments 5 and 7, which is different than the method described in Embodiment 8. In FIGS. 15A to 15C, the same portions as FIG. 11 are denoted by the same reference numerals and a description thereon is omitted.

In FIG. 15A, after forming the first electrode 1007, an insulating film 1508 a is formed. An insulating film 1508 b is formed over the insulating film 1508 a. A single layer or stacked layers of an inorganic insulating film and an organic insulating film can be used as the insulating films 1508 a and 1508 b. Further, a material having a backbone structure of a Si (silicon)—O (oxygen) bond can be used as well. As a substituent for this material, an organic group (for example, an alkyl group and aromatic carbon hydride) containing at least hydrogen is used. As the substituent, a fluoro group may be used as well. Moreover, a fluoro group and an organic group containing at least hydrogen may also be used.

The insulating film 1508 b is etched to form the first aperture portion 1511 a and the second aperture portion 1512.

In FIG. 15B, the insulating film 1508 a is etched in the first aperture portion 1511 a to form a third aperture portion 1511 b. In this manner, the third aperture portion 1511 b in which a surface of the first electrode 1007 is exposed and a second aperture portion 1512 in which a surface of the insulating film 1508 a is exposed can be obtained. The patterned insulating films 1508 a and 1508 b correspond to the third insulating film 1008 described in Embodiments 5 and 7. In this manner, the third insulating film 1008 having a thin portion is obtained.

In FIG. 15C, the light emitting layer 1009 and the second electrode 1010 are sequentially formed.

The capacitor 1112 has capacitance with the insulating film 1508 a as a dielectric substance; therefore, the insulating film 1508 a preferably has a high dielectric material such as a silicon nitride film, for example.

This embodiment can be freely implemented in combination with embodiment modes and Embodiments 1 to 7.

Embodiment 10

The display device and the driving method of the invention can be applied to various electronic devices each having the display device incorporated in a display portion thereof.

The electronic devices include a camera (a video camera, a digital camera and the like), a projector, a head mounted display (a goggle type display), a navigation system, a car stereo set, a personal computer, a game machine, a portable information terminal (a mobile computer, a portable phone, an electronic book or the like), an image reproducing device provided with a recording medium (specifically, a device which reproduces a recording medium such as a DVD (Digital Versatile Disc) and has a display which can display the reproduced image), and the like. Examples of the electronic devices are shown in FIGS. 9A to 9D.

FIG. 9A illustrates a notebook personal computer including a main body 911, a housing 912, a display portion 913, a keyboard 914, an external connecting port 915, a pointing pad 916 and the like. The display device and driving method thereof of the invention are applied to the display portion 913. By using the invention, a clear display of the display portion 913 with a higher contrast can be realized with less power consumption. It is quite effective to apply the invention to the notebook personal computer which requires a reduction in power consumption.

FIG. 9B illustrates an image reproducing device provided with a recording medium (specifically a DVD reproducing device), including a main body 921, a housing 922, a first display portion 923, a second display portion 924, a recording medium (a DVD and the like) reading portion 925, an operating key 926, a speaker portion 927 and the like. The first display portion 923 mainly displays image data while the second display portion 924 mainly displays text data. The display device and driving method thereof of the invention are applied to the first display portion 923 and the second display portion 924. By using the invention, a clear display of the first display portion 923 and the second display portion 924 with a higher contrast can be realized with less power consumption.

FIG. 9C illustrates a portable phone including a main body 931, an audio output portion 932, an audio input portion 933, a display portion 934, operating switches 935, an antenna 936 and the like. The display device and driving method thereof of the invention are applied to the display portion 934. By using the invention, a clear display of the display portion 934 with a higher contrast can be realized with less power consumption. It is quite effective to apply the invention to the portable phone which requires a reduction in power consumption.

FIG. 9D illustrates a camera including a main body 941, a display portion 942, a housing 943, an external connecting port 944, a remote control receiving portion 945, an image receiving portion 946, a battery 947, an audio input portion 948, operating keys 949 and the like. The display device and driving method of the invention are applied to the display portion 942. By using the invention, a clear display of the display portion 942 with a higher contrast can be realized with less power consumption.

This embodiment mode can be freely implemented in combination with embodiment modes and Embodiments 1 to 9.

This application is based on Japanese Patent Application serial no. 2004-270477 filed in Japan Patent Office on 16th, Sep., 2004, the entire contents of which are hereby incorporated by reference. 

1-43. (canceled)
 44. A display device comprising a pixel, the pixel comprising: a transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate; a first capacitor; a second capacitor; a first insulating layer over the transistor; a second insulating layer over the first insulating layer, the second insulating layer having a first opening and a second opening; and a light emitting element comprising: a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer; a light emitting layer over the pixel electrode; and a conductive layer over the second insulating layer and the light emitting layer, wherein the conductive layer is located over the first opening and the second opening, wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening, wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the second capacitor is electrically connected to the pixel electrode, and wherein the second capacitor and the light emitting element are connected in parallel with each other.
 45. The display device according to claim 44, wherein the gate is located over the semiconductor layer.
 46. The display device according to claim 44, wherein a first electrode of the second capacitor is the pixel electrode, and wherein a second electrode of the second capacitor is the conductive layer.
 47. The display device according to claim 44, wherein the pixel electrode is located below the first opening and the second opening.
 48. The display device according to claim 44, further comprising a means for setting a potential and a third insulating layer, wherein the means is electrically connected to the conductive layer, and wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
 49. The display device according to claim 44, further comprising another transistor, a first power source line, and a second power source line, wherein one of a source and a drain of the another transistor is electrically connected to the pixel electrode and the other of the source and the drain of the another transistor is directly connected to the first power source line, wherein the second power source line is electrically connected to the conductive layer, and wherein a potential of the second power source line is lower than that of the first power source line.
 50. A display device comprising a pixel, the pixel comprising: a transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate; a first capacitor; a second capacitor; a first insulating layer over the transistor; a first conductive layer over the first insulating layer, the first conductive layer overlapping with the channel formation region of the transistor; a second insulating layer over the first insulating layer, the second insulating layer having a first opening and a second opening; and a light emitting element comprising: a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer; a light emitting layer over the pixel electrode; and a second conductive layer over the second insulating layer and the light emitting layer, wherein the second conductive layer is located over the first opening and the second opening, wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening, wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the second capacitor is electrically connected to the pixel electrode, and wherein the second capacitor and the light emitting element are connected in parallel with each other.
 51. The display device according to claim 50, wherein the gate is located over the semiconductor layer.
 52. The display device according to claim 50, wherein a first electrode of the second capacitor is the pixel electrode, and wherein a second electrode of the second capacitor is the second conductive layer.
 53. The display device according to claim 50, wherein the pixel electrode is located below the first opening and the second opening.
 54. The display device according to claim 50, further comprising a means for setting a potential and a third insulating layer, wherein the means is electrically connected to the conductive layer, and wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
 55. The display device according to claim 50, further comprising another transistor, a first power source line, and a second power source line, wherein one of a source and a drain of the another transistor is electrically connected to the pixel electrode and the other of the source and the drain of the another transistor is directly connected to the first power source line, wherein the second power source line is electrically connected to the second conductive layer, and wherein a potential of the second power source line is lower than that of the first power source line.
 56. The display device according to claim 50, wherein the pixel electrode is directly connected to the first conductive layer.
 57. The display device according to claim 50, wherein a third capacitor is formed using the first conductive layer, the second insulating layer, and the second conductive layer.
 58. A display device comprising a pixel, the pixel comprising: a first transistor; a second transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate; a first capacitor; a second capacitor; a first insulating layer over the first transistor and the second transistor; a second insulating layer over the first insulating layer, the second insulating layer having a first opening and a second opening; and a light emitting element comprising: a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer; a light emitting layer over the pixel electrode; and a conductive layer over the second insulating layer and the light emitting layer, wherein the conductive layer is located over the first opening and the second opening, wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening, wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the second capacitor is electrically connected to the pixel electrode, wherein the second capacitor and the light emitting element are connected in parallel with each other, and wherein one of a source and a drain of the second transistor is electrically connected to the gate.
 59. The display device according to claim 58, wherein the gate is located over the semiconductor layer.
 60. The display device according to claim 58, wherein a first electrode of the second capacitor is the pixel electrode, and wherein a second electrode of the second capacitor is the conductive layer.
 61. The display device according to claim 58, wherein the pixel electrode is located below the first opening and the second opening.
 62. The display device according to claim 58, further comprising a means for setting a potential and a third insulating layer, wherein the means is electrically connected to the conductive layer, and wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
 63. The display device according to claim 58, further comprising a third transistor, a first power source line, and a second power source line, wherein one of a source and a drain of the third transistor is electrically connected to the pixel electrode and the other of the source and the drain of the third transistor is directly connected to the first power source line, wherein the second power source line is electrically connected to the conductive layer, and wherein a potential of the second power source line is lower than that of the first power source line.
 64. A display device comprising a pixel, the pixel comprising: a first transistor: a second transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate; a first capacitor; a second capacitor; a first insulating layer over the first transistor and the second transistor; a first conductive layer over the first insulating layer, the first conductive layer overlapping with the channel formation region of the second transistor; a second insulating layer over the first insulating layer, the second insulating layer having a first opening and a second opening; and a light emitting element comprising: a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer; a light emitting layer over the pixel electrode; and a second conductive layer over the second insulating layer and the light emitting layer, wherein the second conductive layer is located over the first opening and the second opening, wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening, wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the second capacitor is electrically connected to the pixel electrode, wherein the second capacitor and the light emitting element are connected in parallel with each other, and wherein one of a source and a drain of the second transistor is electrically connected to the gate.
 65. The display device according to claim 64, wherein the gate is located over the semiconductor layer.
 66. The display device according to claim 64, wherein a first electrode of the second capacitor is the pixel electrode, and wherein a second electrode of the second capacitor is the second conductive layer.
 67. The display device according to claim 64, wherein the pixel electrode is located below the first opening and the second opening.
 68. The display device according to claim 64, further comprising a means for setting a potential and a third insulating layer, wherein the means is electrically connected to the conductive layer, and wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
 69. The display device according to claim 64, further comprising a third transistor, a first power source line, and a second power source line, wherein one of a source and a drain of the third transistor is electrically connected to the pixel electrode and the other of the source and the drain of the third transistor is directly connected to the first power source line, wherein the second power source line is electrically connected to the second conductive layer, and wherein a potential of the second power source line is lower than that of the first power source line.
 70. The display device according to claim 64, wherein the pixel electrode is electrically connected to the semiconductor layer through the first conductive layer.
 71. The display device according to claim 64, wherein a third capacitor is formed using the first conductive layer, the second insulating layer, and the second conductive layer. 